Recently, techniques for fabricating semiconductor devices with semiconductor thin films formed on an insulating substrate, for example, semiconductor devices with semiconductor elements such as thin film transistors (TFT) have been rapidly developed. This is because of the increasing demand for liquid-crystal display devices (typically, active matrix liquid-crystal display devices). The active matrix liquid-crystal display device displays images by controlling electric charges flowing into and out of several hundred thousands to several millions of display pixels arranged in a matrix by means of switching elements of the display pixels.
Moreover, the semiconductor device comprises integrated circuits such as active matrix circuits formed by using TFTs or the like, ICs, ULSIs, and VLSIs. There are increasing tendencies to provide much finer integrated circuits, thus requiring sub-micron patterns.
Accordingly, such attempts have been made to reduce the size (such as the width of wirings and channels, and the diameter of contact holes) of each portion of the semiconductor elements in integrated circuits. In particular, there are increasing necessities for ensuring electrical connections at the bottom of a contact hole small in diameter by finer and multi-layer tracing techniques.
Conventionally, insulating films deposited by the CVD method have been frequently used as inter-layer insulating films, and the dry etching method or the wet etching method have been used to form contact holes.
For example, in cases where a silicon oxide film is used as a first inter-layer insulating film of a thin film transistor, the wet etching method is used to form contact holes from the viewpoints of the selective ratio between the inter-layer insulating film and the semiconductor layer and the ease in fabrication. Where the dry etching method is used, since the silicon oxide film and the semiconductor layer predominantly composed of silicon have the same main ingredient, such a problem was present in that the selective ratio was low and the semiconductor layer, which is thin in thickness, was stripped off at the same time.
However, in cases where much finer contact holes than conventional ones were to be formed, the wet etching method is an isotropic etching method, so that over-etching inevitably occurred and thus finer patterning had been prevented. For example, in a case where a contact hole 2 μm in diameter is to be formed, a resultant contact hole would be about two times or more in diameter which is dependent on thickness.
The present invention relates to a method for forming a finer contact hole (typically, 2 through 3 μm or less) than a conventional one, particularly in a fabrication method of sub-micron thin film transistors.
The present invention is adapted to use an organic material in inter-layer insulating films and form contact holes by the dry etching method in an inter-layer insulating film composed of the organic material.
Conventionally, in the case where a resist mask was used in the dry etching method, since the mask has a similar constituent, it was difficult to ensure the selective ratio between the film of an organic material and the resist mask and thus contact holes were formed with difficulty. Therefore, use of a resist mask to form contact holes that were provided in inter-layer insulating films composed of an organic material was avoided.
The invention to be disclosed in this specification provides the theme to solve the aforementioned problems to form fine contact holes and thus provide finer patterning of integrated circuits.